Architectural optimization for microelectronic packaging
نویسندگان
چکیده
منابع مشابه
Residual stress prediction for microelectronic packaging materials
At cure temperatures below Tg the cure shrinkage contributes significantly to residual stress build-up. Residual stresses in a flip chip package The cure shrinkage model was implemented in FE code. In figures 2 and 3 the residual stress build-up for a 2D plane strain model of an adhesively bonded flip chip is shown. A schematic representation of the model is given in the inset of figure 3. For ...
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ژورنال
عنوان ژورنال: Applied Thermal Engineering
سال: 2009
ISSN: 1359-4311
DOI: 10.1016/j.applthermaleng.2008.12.037